1. Field of the Invention
Example embodiments relate to a semiconductor device manufacturing method and apparatus. More particularly, example embodiments relate to a method for manufacturing a semiconductor device through a dimension analysis of layer material formed on a semiconductor substrate, and to an apparatus employing the same.
2. Description of the Related Art
An optical critical dimension (OCD) technology refers to techniques of acquiring information of a semiconductor substrate surface through a polarized light state change.
For example, the OCD technology may be realized by analyzing, e.g., via a Rigorous Coupled Wave Analysis (RCWA) principle, a spectrum acquired through use of an optical device, e.g., a spectroscopic ellipsometer (SE) or a spectroscopic reflectrometer (SR), from a regular pattern, e.g., a pattern having a size on a scale of tens nanometers to hundreds of nanometers. The OCD technology may be used to analyze a profile of such a pattern to measure, e.g., a thickness of pattern, critical dimension (CD), height, recess, roughness, and so forth.
A conventional layer material dimension analysis method using the RCWA principle may perform the Fourier transform of a spectrum measured from the regular pattern, and may process and manage it as a profile parameter through Maxwell equations.
However, while the conventional layer material dimension analysis may be performed for a two-dimensional computation, e.g., of line/space structure, of the regular pattern, the conventional layer material dimension analysis may be complex for a three-dimensional computation, e.g., of an island structure, of the regular pattern. In particular, the Fourier transform and Maxwell equations may be complicated for a three-dimensional structure, and may require a long computational time, e.g., computation and analysis of a three-dimensional structure may be about 100 times longer than computation and analysis of a two-dimensional structure via the Fourier transform and Maxwell equations. Therefore, the conventional layer material dimension analysis may have a limited application with respect to a three-dimension pattern, so monitoring of a semiconductor manufacturing process in real time may be complicated.